1. Field of the Invention
The present invention relates to an image capturing device for generating an image signal to output using an image capturing element and, in particular, to clamping of an image signal.
2. Description of the Related Art
An image signal captured by an image capturing element such as a CCD (charge coupled device) image sensor or the like is generally coupled by a capacitor for extraction. Therefore, the DC level of an image signal can fluctuate depending on the level of an image. In order to address this problem, an image signal corresponding to an optical black (OPB) region which is provided at the periphery of the pixel alignment of image capturing elements is clamped at a predetermined black level. In clamping, a signal terminal which outputs an image signal coupled by the capacitor is connected to a reference power source during an OPB image signal period.
An OPB region is provided surrounding the effective image capturing region, as described above. That is, a small number of top and bottom pixel lines of a plurality of horizontal lines which constitute the image alignment of image capturing elements, and a small number of pixels respectively at the leading and trailing ends of the horizontal lines constitute an OPB region. Clamping is applied during an OPB image signal period for each horizontal line, therefore periodically, and the periodical clamping for every horizontal line can suppress fluctuation of the DC level of an image signal which would otherwise be caused during a vertical scanning period.
FIG. 11 schematically shows a circuit structure of a conventional image capturing device, which comprises a CCD image sensor 2, a clamping circuit 4, an analogue signal processing circuit 6, an A/D (analogue/digital) converter 8, and a digital signal processing circuit 10. An image signal generated by the CCD image sensor 2 is coupled by a capacitor 4a in the clamping circuit 4 to be extracted to a signal line 22. The extracted image signal is subjected to predetermined signal processing in the analogue signal processing circuit 6, the A/D converter 8, and the digital signal processing circuit 10 before being output to, for example, a display device, or the like.
The clamping circuit 4 is a circuit for clamping the potential of the signal line 22, and comprises a buffer circuit 4b, which serves as a reference voltage source, and a switch element 4c for connecting the buffer circuit 4b and the signal line 22. The buffer circuit 4b comprises, for example, two transistors M1, M2 serially connected between the power source terminal and the ground terminal and outputs a voltage between the two transistors M1 and M2 as a reference voltage. The transistor M1 receives via its gate a first control voltage V1, according to which a current flowing in the buffer circuit 4b is determined. The transistor M2 receives via its gate a second control voltage V2, according to which an output voltage of the buffer circuit 4b is determined. The opening and closing of the switch element 4c is controlled in response to a clamp pulse CP, which is generated by a timing control circuit, not shown.
FIG. 12 is a timing chart explaining operation of a conventional clamping circuit. Specifically, a clamp pulse 30 is caused in synchronism with a horizontal synchronous signal HT. Each clamp pulse 30 has a predetermined width, during a period corresponding to which the switch element 4c remains in an ON state so that an output voltage VK of the buffer circuit 4b is applied to the signal line 22. A clamp pulse 30 is caused within an OPB image signal period at the beginning of each horizontal line, so that an OPB image signal is clamped at a predetermined potential whereby a black level is fixed at a constant level.
In clamping, a current is supplied from the buffer circuit 4b to the signal line 22, so that the potential of the signal line 22 is made closer to an output voltage VK of the buffer circuit 4b. The size of the potential change in the signal line 22 caused in a single application of clamping is here referred to as the “clamping capability. Clamping capability depends on current supply capacity of the buffer circuit 4b and a period of time in which the switch element 4c remains in an ON state. That is, the larger the current supply capacity of the buffer circuit 4b or the longer the electric conductive time, the larger the ensured clamping capability.
Here, the more the clamping capability is enhanced, the more a DC level to be set becomes likely to follow noise in an OPB image signal period. Consequently, a DC level of an image signal fluctuates for every horizontal line, causing combing noise in a reproduced image.
In order to address this problem, clamping capability is set at such a relatively low level, rather than the maximum level, that a relatively large number of lines are clamped at a predetermined level so that noise influence can be leveled and combing noise can be suppressed. For example, conventionally, clamping capability is set at such a time constant that achieves potential conversion which converts, while taking the whole file period, the potential at an output terminal into a potential at a predetermined level.
While image capturing does not take place, an image capturing element is not driven so that power consumption in the image capturing element, the driving circuit, and the signal processing circuit can be suppressed. During such a period, no OPB image signal is obtained and clamping is not applied, and, therefore, the potential at the output terminal is caused to change due to discharge from the capacitor while the image capturing element is not driven.
As described above, conventionally, a suppressed clamping capability, rather than the maximum clamping capability, is employed to prevent combing noise. Therefore, there exists a problem that a longer period of time is required, at the time of start of driving of an image capturing element, before the potential at the output terminal becomes stabilized with the image capturing element operating in a stable state. In turn, a longer period of time is required before an image settles in a stable state.
This process necessary to increase a clamping level to a predetermined potential level is one of the factors which hinders time reduction in activation of an image capturing device.